1. Field of the Invention
The present invention relates to methods for producing integrated circuit devices having lightly doped drain MOSFET with polycide gates structures.
2. Description of Prior Art
The use of polycide gates or interconnect line, that is a combination of layers of polysilicon and a refractory metal silicide is becoming very important as the industry moves to smaller device geometries. In the past, polysilicon was satisfactory as the gate electrodes and for interconnecting lines. However, as these geometries become smaller, polysilicon has become too high in resistivity for these applications due to its affect on RC time delays and IR voltage drops. The use of a combination of refractory metal silicides with polysilicon has proven suitable because of its lower resistivity.
Silicides of certain refractory metals, i.e. tungsten, molybdenum, titanium, and tantalum have been proven to be suitable for use as a low resistance interconnect material for VLSI integrated circuit fabrication. The disilicides pair very well with heavily doped polysilicon to form polycide gates, because of the criteria of low resistivity and high temperature stability. Tungsten silicide has particularly been found to be capable of overcoming some shortcomings, such as stoichiometry control, surface roughness, adhesion, oxidation and reproducibility to be very useful in combination with polysilicon.
The preferred deposition technique of tungsten silicide is low pressure chemical vapor deposition. The oxidation characteristics of tungsten silicide as produced by this method are very similar to those of polysilicon. The silicon to tungsten ratio in the tungsten silicide film can vary according to the tungsten fluoride and silane gas mixture and reactor conditions. It has been found that low pressure chemical vapor deposited tungsten silicide is stable as soon as the silicon to tungsten ratio is moderately greater than two. Higher silicon concentration is necessary to provide excess silicon during high temperature oxidation, maintain tungsten silicide stoichiometry, and improve silicide adhesion to polysilicon.
It is also a fact that peeling of this polycide film can happen frequently if care is not taken during processing and handling of the wafers. This in turn causes the low yield of the product. Workers in the field have tried to overcome this problem by capping with silicon dioxide during the reaction of titanium with the underlying polysilicon layer such as shown by T. E. Tang et al in U.S. Pat. No. 4,690,730.
It is an important object of this invention to overcome this peeling problem and raise yields.
Another object of this invention is to reduce or minimize segregation of boron atoms in the manufacture of lightly doped drain P channel MOSFET integrated circuits.
FIG. 1 illustrates a Prior Art problem called Graded Gate Oxide or GGO. When a lightly doped drain MOSFET structure is formed on and in P- substrate 1 with its elements gate oxide 2, polysilicon gate 3, dielectric spacers 4, lightly doped regions 5 and heavily doped regions 6 it is then necessary to form a passivation layer 7 thereover. A preferred passivation layer is a borophosphosilicate glass. It is preferred because it can be heated to cause the flow and densification of this glass to smooth the surface of the top surface of the structure. The best conditions for heating the glass is in wet oxygen, but this causes the illustrated undesirable GGO turn up of the edges of the polysilicon gate 3 in the FIG. 1.
It is therefor another object of this invention to overcome the Graded Gate Oxide (GGO) problem.